The electronics industry has experienced an ever increasing demand for smaller and faster electronic devices which are simultaneously able to support a greater number of increasingly complex and sophisticated functions. Accordingly, there is a continuing trend in the semiconductor industry to manufacture low-cost, high-performance, and low-power integrated circuits (ICs). Thus far these goals have been achieved in large part by scaling down semiconductor IC dimensions (e.g., minimum feature size) and thereby improving production efficiency and lowering associated costs. However, such scaling has also introduced increased complexity to the semiconductor manufacturing process. Thus, the realization of continued advances in semiconductor ICs and devices calls for similar advances in semiconductor manufacturing processes and technology.
In particular, back-end-of-line (BEOL) fabrication processes have presented a particularly difficult challenge for advanced IC fabrication. BEOL fabrication includes interconnect structures, for example, made up of a multi-level network of metal wiring. Any of a plurality of IC circuits and/or devices may be connected by such interconnect structures. In various examples, however, interconnect performance degrades with dimensional scaling. For instance, resistance (R) increases as dimensions get smaller and capacitance (C) increases as a density of interconnects increases, both of which increase RC-delay. In some cases, different materials and/or processes for interconnect fabrication are being studied. In other examples, an increasing number of metal layers are being used as part of the multi-level interconnect network, to provide additional interconnect routing paths and potentially reduce R (e.g., by increasing interconnect dimensions) and/or reduce C (e.g., by reducing interconnect density). However, increasing the number of metal layers will invariably increase a total interconnect length, which can also degrade device performance. Moreover, the addition of metal layers will lead to an increase in cost (e.g., additional photomasks, design time, etc.).
Thus, existing techniques have not proved entirely satisfactory in all respects.